Microprocessor and Interfacing Technique MCQs | Page - 5

Dear candidates you will find MCQ questions of Microprocessor and Interfacing Technique here. Learn these questions and prepare yourself for coming examinations and interviews. You can check the right answer of any question by clicking on any option or by clicking view answer button.

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Mr. Dubey • 97.30K Points
Coach

Q. DIP stand for:

  • (A) deal inline package
  • (B) dual inline package
  • (C) direct inline package
  • (D) digital inline package
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Mr. Dubey • 97.30K Points
Coach

Q. SBA stand for:

  • (A) segment bus address
  • (B) segment bit address
  • (C) segment base address
  • (D) segment byte address
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Mr. Dubey • 97.30K Points
Coach

Q. ALE stand for:

  • (A) address latch enable
  • (B) address light enable
  • (C) address lower enable
  • (D) address last enable
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M

Mr. Dubey • 97.30K Points
Coach

Q. The offset of a particular segment varies from :

  • (A) 000h to fffh
  • (B) 0000h to ffffh
  • (C) 00h to ffh
  • (D) 00000h to fffffh
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Mr. Dubey • 97.30K Points
Coach

Q. which is the small amount of high- speed memory used to work directly with the microprocessor:

  • (A) cache
  • (B) case
  • (C) cost
  • (D) coos
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M

Mr. Dubey • 97.30K Points
Coach

Q. The cache usually gets its data from the whenever the instruction or data is required by the CPU:

  • (A) main memory
  • (B) case memory
  • (C) cache memory
  • (D) all of these
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M

Mr. Dubey • 97.30K Points
Coach

Q. Which causes the microprocessor to immediately terminate its present activity:

  • (A) reset signal
  • (B) interupt signal
  • (C) both
  • (D) none of these
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