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Q. The directly mapped cache no replacement algorithm is required.

Q. The access time is composed of

Q. The associatively mapped virtual memory makes use of

Q. The program is divided into operable parts called as

Q. The logic operations are implemented using _______ circuits.

Q. The performance depends on

Q. A hard disk with 20 surfaces will have ______ heads.

Q. The advantage of I/O mapped devices to memory mapped is _______

Q. If the instruction Add R1, R2, R3 is executed in a system which is pipelined, then the value of S is (Where S is a term of the Basic performance equation).

Q. Each stage in pipelining should be completed within ____ cycle.