Computer Microprocessor and Assembly Language MCQs | Page - 2

Dear candidates you will find MCQ questions of Computer Microprocessor and Assembly Language here. Learn these questions and prepare yourself for coming examinations and interviews. You can check the right answer of any question by clicking on any option or by clicking view answer button.

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Admin • 34.80K Points
Instructor I

Q. Which are the architectural paradigms in microprocessor:

(A) RISC
(B) CISC
(C) PISC
(D) A and B
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A

Admin • 34.80K Points
Instructor I

Q. Which is not the main architectural feature of Power PC

(A) It is not based on RISC
(B) Superscalar implementation
(C) Both 32 & 64 Bit
(D) Paged Memory management architecture
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A

Admin • 34.80K Points
Instructor I

Q. Which is not the main feature of DEC Alpha

(A) 64 Bit RISC processor
(B) Designed to replace 32 VAX(CISC)
(C) Seven stage split integer/floating point pipeline
(D) Variable Instruction length
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A

Admin • 34.80K Points
Instructor I

Q. Which is not the open-source OS

(A) Debian
(B) BSD Unix
(C) Gentoo & Red Hat Linux
(D) Windows
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A

Admin • 34.80K Points
Instructor I

Q. __________ a subsystem that transfer data between computer components inside a computer or between computer

(A) Chip
(B) Register
(C) Processor
(D) Bus
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A

Admin • 34.80K Points
Instructor I

Q. ________ causes the address of the next microprocessor to be obtained from the memory

(A) CRJA
(B) ROM
(C) MAP
(D) HLT
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A

Admin • 34.80K Points
Instructor I

Q. ________ is the condition

(A) CD
(B) IR
(C) Both a and b
(D) None of these
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A

Admin • 34.80K Points
Instructor I

Q. _________ is the most commonly used cache controller with a number of processor sets

(A) L211 controller
(B) L210 controller
(C) L214 controller
(D) None of these
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A

Admin • 34.80K Points
Instructor I

Q. ________ is the most important segment and it contains the actual assembly language instruction to be executed by the microprocessor

(A) Data segment
(B) Code segment
(C) Stack segment
(D) Extra segment
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A

Admin • 34.80K Points
Instructor I

Q. ________ is usually the first level of memory access by the microprocessor

(A) Cache memory
(B) Data memory
(C) Main memory
(D) All of these
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