Digital Principles and System Design MCQs | Page - 3

Dear candidates you will find MCQ questions of Digital Principles and System Design here. Learn these questions and prepare yourself for coming examinations and interviews. You can check the right answer of any question by clicking on any option or by clicking view answer button.

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Mr. Dubey • 53.08K Points
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Q. Each group of adjacent Minterms (group size in powers of twos) corresponds to a possible product term of the given                        

(A) function
(B) value
(C) set
(D) word
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Mr. Dubey • 53.08K Points
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Q. Don’t care conditions can be used for simplifying Boolean expressions in                        

(A) registers
(B) terms
(C) k-maps
(D) latches
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Mr. Dubey • 53.08K Points
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Q. It should be kept in mind that don’t care terms should be used along with the terms that are present in

(A) minterms
(B) expressions
(C) k-map
(D) latches
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Mr. Dubey • 53.08K Points
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Q. Using the transformation method you can realize any POS realization of OR-AND with only.

(A) xor
(B) nand
(C) and
(D) nor
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Mr. Dubey • 53.08K Points
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Q. There are many situations in logic design in which simplification of logic expression is possible in terms of XOR and                                    operations.

(A) x-nor
(B) xor
(C) nor
(D) nand
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Mr. Dubey • 53.08K Points
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Q. In case of XOR/XNOR simplification we have to look for the following                                

(A) diagonal adjacencies
(B) offset adjacencies
(C) straight adjacencies
(D) both diagonal and offset adjencies
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Mr. Dubey • 53.08K Points
Coach

Q. Entries known as                                mapping.

(A) diagonal
(B) straight
(C) k
(D) boolean
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Mr. Dubey • 53.08K Points
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Q. The code where all successive numbers differ from their preceding number by single bit is                      

(A) alphanumeric code
(B) bcd
(C) excess 3
(D) gray
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Mr. Dubey • 53.08K Points
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Q. How many AND gates are required to realize Y = CD + EF + G?

(A) 4
(B) 5
(C) 3
(D) 2
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Mr. Dubey • 53.08K Points
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Q. The NOR gate output will be high if the two inputs are                      

(A) 00
(B) 01
(C) 10
(D) 11
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