Digital Electronics MCQs and Notes

A

Admin • 36.93K Points
Coach

Q 21. An op-amp has very ________.

(A) high voltage gain

(B) high input impedance

(C) low output impedance

(D) all of the above

V

Vijay Sangwan • 28.62K Points
Instructor II

Q 22. Which term applies to the maintaining of a given signal level until the next sampling?

(A) holding

(B) aliasing

(C) shannon frequency sampling

(D) "stair-stepping"

A

Admin • 36.93K Points
Coach

Q 23. In a flash analog-to-digital converter, the output of each comparator is connected to an input of a ________.

(A) decoder

(B) priority encoder

(C) multiplexer

(D) demultiplexer

R

Ram Sharma • 193.84K Points
Coach

Q 24. Show from the truth table how an exclusive-OR gate can be used to invert the data on one input if the other input is a special control function.

(A) using a as the control, when a = 0, x is the same as b. when a = 1, x is the same as b.

(B) using a as the control, when a = 0, x is the same as b. when a = 1, x is the inverse of b.

(C) using a as the control, when a = 0, x is the inverse of b. when a = 1, x is the same as b.

(D) using a as the control, when a = 0, x is the inverse of b. when a = 1, x is the inverse of b.

V

Vinay • 28.75K Points
Instructor II

Q 25. Which type of gate can be used to add two bits?

(A) ex-or

(B) ex-nor

(C) ex-nand

(D) nor

V

Vinay • 28.75K Points
Instructor II

Q 26. Parity systems are defined as either________ or ________ and will add an extra ________ tothe digital information being transmitted.

(A) positive, negative, byte

(B) odd, even, bit

(C) upper, lower, digit

(D) on, off, decimal

V

Vijay Sangwan • 28.62K Points
Instructor II

Q 27. Identify the type of gate below from the equation

(A) ex-nor gate

(B) or gate

(C) ex-or gate

(D) nand gate

R

Ranjeet • 34.60K Points
Instructor I

Q 28. A logic circuit that provides a HIGH output if one input or the other input, but not both, is HIGH, is a(n):

(A) ex-nor gate

(B) or gate

(C) ex-or gate

(D) nand gate

R

Ram Sharma • 193.84K Points
Coach

Q 29. A logic circuit that provides a HIGH output for both inputs HIGH or both inputs LOW is a(n):

(A) ex-nor gate

(B) or gate

(C) ex-or gate

(D) nand gate

R

Ranjeet • 34.60K Points
Instructor I

Q 30. Select the statement that best describes the parity method of error detection:

(A) parity checking is best suited for detecting double-bit errors that occur during the transmission of codes from one location to another.

(B) parity checking is not suitable for detecting single-bit errors in transmitted codes.

(C) parity checking is best suited for detecting single-bit errors in transmitted codes.

(D) parity checking is capable of detecting and correcting errors in transmitted codes.