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Dear candidates you will find MCQ questions of Digital Logic Circuits (DLC) here. Learn these questions and prepare yourself for coming examinations and interviews. You can check the right answer of any question by clicking on any option or by clicking view answer button.

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Mr. Dubey • 51.17K Points
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Q. 31) The systematic reduction of logic circuits is accomplished by:

(A) symbolic reduction
(B) ttl logic
(C) using boolean algebra
(D) using a truth table
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Q. 32) Each “1” entry in a K-map square represents:

(A) a high for each input truth table condition that produces a high output
(B) a high output on the truth table for all low input combinations
(C) a low output for all possible high input conditions
(D) a don’t care condition for all possible input truth table combinations
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Mr. Dubey • 51.17K Points
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Q. 33) Each “0” entry in a K-map square represents:

(A) a high for each input truth table condition that produces a high output
(B) a high output on the truth table for all low input combinations
(C) a low output for all possible high input conditions
(D) a don’t care condition for all possible input truth table combinations
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Mr. Dubey • 51.17K Points
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Q. 34) Looping on a K-map always results in the elimination of

(A) variables within the loop that appear only in their complemented form
(B) variables that remain unchanged within the loop
(C) variables within the loop that appear in both complemented and uncomplemented form
(D) variables within the loop that appear only in their uncomplemented form
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Mr. Dubey • 51.17K Points
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Q. 35) Which of the following expressions is in the sum-of-products form?

(A) (a + b)(c + d)
(B) (a * b)(c * d)
(C) a* b *(cd)
(D) a * b + c * d
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Q. 36) What is an ambiguous condition in a NAND based S’-R’ latch?

(A) s’=0, r’=1
(B) s’=1, r’=0
(C) s’=1, r’=1
(D) s’=0, r’=0
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Q. 37) In a NAND based S’-R’ latch, if S’=1 & R’=1 then the state of the latch is

(A) no change
(B) set
(C) reset
(D) forbidden
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Q. 38) A NAND based S’-R’ latch can be converted into S-R latch by placing

(A) a d latch at each of its input
(B) an inverter at each of its input
(C) it can never be converted
(D) both a d latch and an inverter at its input
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Q. 39) The difference between a flip-flop & latch is

(A) both are same
(B) flip-flop consist of an extra output
(C) latches has one input but flip-flop has two
(D) latch has two inputs but flip-flop has one
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Q. 40) How many types of flip-flops are?

(A) 2
(B) 3
(C) 4
(D) 5
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Digital Logic Circuits (DLC) MCQs Set 1

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Digital Logic Circuits (DLC) MCQs Set 34

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