Digital Logic Circuits (DLC) MCQs | Page - 4
Dear candidates you will find MCQ questions of Digital Logic Circuits (DLC) here. Learn these questions and prepare yourself for coming examinations and interviews. You can check the right answer of any question by clicking on any option or by clicking view answer button.
M
Q. The systematic reduction of logic circuits is accomplished by:
M
Q. Each “1” entry in a K-map square represents:
M
Q. Each “0” entry in a K-map square represents:
M
Q. Looping on a K-map always results in the elimination of
M
Q. Which of the following expressions is in the sum-of-products form?
M
Q. What is an ambiguous condition in a NAND based S’-R’ latch?
M
Q. In a NAND based S’-R’ latch, if S’=1 & R’=1 then the state of the latch is
M
Q. A NAND based S’-R’ latch can be converted into S-R latch by placing
M
Q. The difference between a flip-flop & latch is
Jump to