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Digital Logic Circuits (DLC) MCQs | Page - 5

Dear candidates you will find MCQ questions of Digital Logic Circuits (DLC) here. Learn these questions and prepare yourself for coming examinations and interviews. You can check the right answer of any question by clicking on any option or by clicking view answer button.

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Q. 41) The S-R flip flop consist of                          

(A) 4 and gates
(B) two additional and gates
(C) an additional clock input
(D) 3 and gates
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Q. 42) What is one disadvantage of an S-R flip-flop?

(A) it has no enable input
(B) it has a race condition
(C) it has no clock input
(D) invalid state
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Q. 43) One example of the use of an S-R flip-flop is as                          

(A) racer
(B) stable oscillator
(C) binary storage register
(D) transition pulse generator
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Q. 44) When is a flip-flop said to be transparent?

(A) when the q output is opposite the input
(B) when the q output follows the input
(C) when you can see through the ic packaging
(D) when the q output is complementary of the input
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Q. 45) On a positive edge-triggered S-R flip-flop, the outputs reflect the input condition when

(A) the clock pulse is low
(B) the clock pulse is high
(C) the clock pulse transitions from low to high
(D) the clock pulse transitions from high to low
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Q. 46) What is the hold condition of a flip-flop?

(A) both s and r inputs activated
(B) no active s or r input
(C) only s is active
(D) only r is active
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Q. 47) One example of the use of an S-R flip-flop is as                        

(A) transition pulse generator
(B) racer
(C) switch debouncer
(D) astable oscillator
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Q. 48) The truth table for an S-R flip-flop has how many VALID entries?

(A) 1
(B) 2
(C) 3
(D) 4
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Q. 49) When both inputs of a J-K flip-flop cycle, the output will                        

(A) be invalid
(B) change
(C) not change
(D) toggle
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Q. 50) Which of the following is correct for a gated D-type flip-flop?

(A) the q output is either set or reset as soon as the d input goes high or low
(B) the output complement follows the input when enabled
(C) only one of the inputs can be high at a time
(D) the output toggles if one of the inputs is held high
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